Portrait of Hao-Hsiang (Thomas) Hsiao

Hao-Hsiang (Thomas) Hsiao

Member of Technical Staff, Ricursive Intelligence
Ph.D. Candidate, Georgia Institute of Technology

I am a Member of Technical Staff at Ricursive Intelligence, while completing my Ph.D. at the Georgia Tech Computer-Aided Design Lab (GTCAD) under the supervision of Prof. Sung Kyu Lim.

My research advances Electronic Design Automation (EDA) for 2D and 3D integrated circuits by combining machine learning, LLM-driven optimization, and accelerated computing — toward faster, smarter physical design flows. I received my B.S. in Electrical Engineering from National Taiwan University and my M.S. in Electrical Engineering and Computer Science from the University of California, Irvine.

Experience

Industry & research appointments

Member of Technical Staff · Ricursive Intelligence, Palo Alto, CA

June 2026 – Presentcurrent

Graduate Research Assistant · Georgia Institute of Technology

August 2022 – Presentcurrent
  • AI-based Physical Design Automation for 2D and 3D ICs (Samsung, 2024–27)
  • Physical Design Using Reinforcement Learning (NSF, 2023–25)
  • Physical Design Closure with Machine Learning (Synopsys, 2024–25)
  • Routability Prediction and Optimization for 3D ICs (Nvidia, 2024–25)

PhD Research Intern, Design Automation · NVIDIA, Santa Clara, CA

Spring 2026

Technical Intern, R&D Team, EDA Group · Synopsys Inc., Sunnyvale, CA

Summer 2025

PhD Research Intern, Design Automation · NVIDIA, Santa Clara, CA

Spring 2025

Technical Intern, R&D Team, EDA Group · Synopsys Inc., Sunnyvale, CA

May 2024 – December 2024
  • Developed an Intelligent Recipe Recommendation System for Fusion Compiler

Technical Intern, R&D Team, Silicon Realization Group · Synopsys Inc., Sunnyvale, CA (remote)

Summer 2022
  • Developed a Reinforcement Learning AI agent for Physical Design global placement

Publications

Selected peer-reviewed work

2026

AI-Assisted IC Design with Accelerated Computing and LLM-Driven Optimization

Yi-Chen Lu, Hao-Hsiang Hsiao*, Rongjian Liang, and Haoxing Ren

IEEE Solid-State Circuits Magazine (MSSC), 2026 · * Corresponding author

MapTuner: Multimodal Recipe Recommendation for Physical Design with Layout Maps and Design Insights

Hao-Hsiang Hsiao, Sudipto Kundu, Wei-Ting Jonas Chan, Chitralekha Dasgupta, and Sung Kyu Lim

IEEE International Conference on LLM-Aided Design (ICLAD), 2026

A Hybrid Reinforcement Learning Framework for Efficient Physical Design Parameter Tuning

Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, and Sung Kyu Lim

ACM Transactions on Design Automation of Electronic Systems (TODAES)

C3PO: Commercial-Quality Global Placement via Coherent, Concurrent Timing, Routability, and Wirelength Optimization

Yi-Chen Lu, Hao-Hsiang Hsiao, Rongjian Liang, Wen-Hao Liu, and Haoxing Ren

31st IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2026. Best Paper Award

Differentiable Tier Assignment for Timing and Congestion-Aware Routing in 3D ICs

Yuan-Hsiang Lu, Hao-Hsiang Hsiao, Yi-Chen Lu, Haoxing Ren, and Sung Kyu Lim

31st IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2026

2025

LLM-Enhanced GPU-Optimized Physical Design at Scale (Invited)

Yi-Chen Lu, Hao-Hsiang Hsiao, and Haoxing Ren

44th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2025

BUFFALO: PPA-Configurable, LLM-based Buffer Tree Generation via Group Relative Policy Optimization

Hao-Hsiang Hsiao, Yi-Chen Lu, Sung Kyu Lim, and Haoxing Ren

44th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2025

DCO-3D: Differentiable Congestion Optimization in 3D ICs

Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-iampikul, Anthony Agnesina, Rongjian Liang, Yuan-Hsiang Lu, Haoxing Ren, and Sung Kyu Lim

62nd ACM Design Automation Conference (DAC), 2025

InsightAlign: A Transferable Physical Design Recipe Recommender Based on Design Insights

Hao-Hsiang Hsiao, Sudipto Kundu, Wei Zeng, Wei-Ting Jonas Chan, Deyuan Guo, and Sung Kyu Lim

62nd ACM Design Automation Conference (DAC), 2025

2024

ML-based Physical Design Parameter Optimization for 3D ICs: From Parameter Selection to Optimization

Hao-Hsiang Hsiao, Pruek Vanna-iampikul, Yi-Chen Lu, and Sung Kyu Lim

61st ACM Design Automation Conference (DAC), 2024

GAN-Place: Advancing Open-Source Placers to Commercial-Quality using Generative Adversarial Networks and Transfer Learning

Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, and Sung Kyu Lim

ACM Transactions on Design Automation of Electronic Systems (TODAES)

FastTuner: Transferable Physical Design Parameter Optimization using Fast Reinforcement Learning

Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, and Sung Kyu Lim

28th ACM International Symposium on Physical Design (ISPD), 2024

2023

DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning

Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, and Sung Kyu Lim

27th ACM International Symposium on Physical Design (ISPD), 2023